There will be a Q&A session to close out the panel discussion.ĬXL technology demonstrations as follows:ĪMD - AMD SEV Enabled Confidential Containers on CXL Encrypted MemoryĪstera Labs - CXL from Promise to Reality with Real Silicon on Customer PlatformsĮlastics.cloud - Rack-Scale Memory Pooling with CXL Participants include Sandeep Dattaprasad (Astera Labs), Cheolmin Park (Samsung), Jerry Lotto (Synopsys), and moderator Kurtis Bowman (AMD). In addition, representatives of the CXL Consortium will be participating in a Birds of a Feather session Thursday, November 17 from 12:15 pm - 1:15 pm in Room D167 entitled: "A look into the Compute Express Link™ (CXL™) device ecosystem". Presenter Kurt Lender (Intel), will be sharing information about the new features and usage models enabled in the CXL 3.0 specification and introducing the CXL technology demonstrations on display in the CXL booth. SC'22 attendees are encouraged to attend our Exhibitor Forum presentation Wednesday, November 16 from 11:00 am - 11:30 am in Room D171. Member companies AMD, Astera Labs, Elastics.cloud, Intel, IntelliProp, MemVerge, Microchip, Rambus, Samsung, Synopsys, UnifabriX, and Xconn Technologies will be providing CXL technology demonstrations. The CXL Consortium, an industry standards body dedicated to advancing Compute Express Link™ (CXL™) technology will be hosting a booth (#2838) at the annual Supercomputing event, SC'22, taking place November 14-17 at the Kay Bailey Hutchison Convention Center in Dallas, TX. For more information or to join, visit View source version on businesswire.The CXL Consortium is hosting booth #2838 which will feature technology demonstrations from twelve member companies CXL is a high-speed interconnect offering coherency and memory semantics using high-bandwidth, low-latency connectivity between the host processor and devices such as accelerators, memory buffers, and smart I/O devices. The CXL Consortium is an industry standards body dedicated to advancing Compute Express Link™ (CXL™) technology. Tuesday, November 15 - Thursday, November 17, 2022 Participants: Sandeep Dattaprasad (Astera Labs), Cheolmin Park (Samsung), Jerry Lotto (Synopsys) Title: A Look Into the Compute Express Link™ (CXL™) Device Ecosystem Title: "Introducing CXL 3.0 for increased scale and optimized resource utilization and CXL technology demos" Presentation: Exhibitor Forum (Room D171) Xconn Technologies - CXL Memory Pooling with a CXL Switch Synopsys CXL 2.0 IP Successful Interoperability and Compliance Testing Samsung - AI/ML Application on CXL Memory Expander with Scalable Memory Development Kit (SMDK) Rambus - CXL Memory Expansion with Intel Archer City PDK Microchip - CXL-based SMC 2000 Smart Memory Controllers MemVerge - Software for Memory Visualization, Tiering & Pooling IntelliProp - Disaggregated and Composable CXL attached Memory Fabric Intel - CXL Type 2 Compliance & Traffic Demo using 4th Gen Intel® Xeon® Scalable Processors and Intel FPGAs
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